Wafer Fab Operations — P1
WAFERF.WAFERFABD044.P1
Operates, sustains, develops, and architects semiconductor wafer fabrication processes (photolithography, etch, deposition, diffusion, CMP) and the tools that run them. Distinct from equipment maintenance/facilities (focused on tool repair and fab infrastructure) and from device/circuit design (this focus owns the physical manufacturing process windows, yield, and process control rather than the IC design itself). The Professional track begins with process-engineering work; pure hourly operator/technician roles belong to a separate non-exempt technician track.
Operates, sustains, develops, and architects semiconductor wafer fabrication processes (photolithography, etch, deposition, diffusion, CMP) and the tools that run them. Distinct from equipment maintenance/facilities (focused on tool repair and fab infrastructure) and from device/circuit design (this focus owns the physical manufacturing process windows, yield, and process control rather than the IC design itself). The Professional track begins with process-engineering work; pure hourly operator/technician roles belong to a separate non-exempt technician track.
Focus — Wafer Fab Operations
Operates, sustains, develops, and architects semiconductor wafer fabrication processes (photolithography, etch, deposition, diffusion, CMP) and the tools that run them. Distinct from equipment maintenance/facilities (focused on tool repair and fab infrastructure) and from device/circuit design (this focus owns the physical manufacturing process windows, yield, and process control rather than the IC design itself). The Professional track begins with process-engineering work; pure hourly operator/technician roles belong to a separate non-exempt technician track.
Responsibilities by level
What this person actually does at each level on the professional track — escalating scope, not one generic blob. Your level is highlighted.
- Operates standard wafer fab equipment (e.g., diffusion furnaces, steppers) under close supervision, loading wafers, running recipes, and monitoring progress against specifications
- Measures basic parameters such as oxide thickness and checks uniformity and product consistency using metrology tools (profilometer, ellipsometer)
- Records and analyzes data through manual entry on process travelers, SPC charts, and logbooks, plus computer entry for lot and equipment tracking in MES
- Ensures the processing environment is clean by following written cleanroom specifications and safety policies
- Learns the process flow of various wafer fab functions while completing assignments under general supervision
- Sustains and improves specific tool processes (e.g., photolithography coating, exposure, develop, inspection, metrology), including creating ASML jobs and designing masks
- Conducts data analysis and basic failure analysis (SEM, CD metrology) to monitor process performance in familiar process modules
- Creates and reviews SPC charts and maintains quality management standards (ISO9001/TS16949, Control Plan, Gauge R&R) for assigned tools
- Defines and documents standard operating procedures and provides instructions to operators
- Supports DOE planning and executes defined experimental procedures in JMP or Minitab under general direction
- Owns full module process windows (e.g., etch or deposition) and independently plans work to improve them
- Plans and leads projects including design of experiments (DOE) to develop and qualify new processes and tools
- Conducts failure analysis (FIB, TEM, XPS, TOFSIMS) and leads yield improvement activities, root-causing variations using structured problem solving (5 Whys, fishbone, 8D)
- Performs cross-team integration linking design rules to process and scaling processes from R&D to production
- Mentors junior engineers and coordinates project activities across operators and technicians
- Leads development and optimization of complex fabrication processes (photolithography, etching, deposition, CMP) with functional yield impact, working hands-on in the cleanroom while implementing process control practices
- Transitions products from development to production, improving process capability and reducing defects through SPC and corrective actions
- Leads capital equipment acquisition projects including tool specification, evaluation, characterization, process development, and qualification
- Collaborates with design engineers to ensure manufacturability and scalability, providing DFM feedback
- Selects methods, leads cross-group yield-improvement teams, and mentors engineering and production staff
- Serves as process architect responsible for technology nodes across fabs, architecting advanced processes for high yield and performance
- Leads cross-functional teams to align technology roadmaps with business objectives on strategic and unique process challenges
- Sets group direction supporting site goals for yield, output, quality, cost, and cycle time, and leads engineering activities to achieve WIP turns and cycle time goals
- Partners with the network and external stakeholders on strategic projects and best-known-method (BKM) deployment across the site
- Leads continuous-improvement initiatives using SPC and DOE to optimize process stability and wafer yield
Level guidelines
The universal leveling rubric applied to this function — how scope, complexity, collaboration, and experience step up across levels.
| Level | Knowledge & Application | Complexity & Problem Solving | Collaboration & Interaction | Typical Degree & Years |
|---|---|---|---|---|
| P1 | Applies basic operating instructions for standard fab equipment and cleanroom protocols; learns process flow of diffusion, lithography, and metrology operations. | Handles routine problems with standard answers (e.g., recipe deviations, thickness out of range); escalates anything outside written specifications. | Maintains stable working relationships with shift technicians and engineers; relays equipment and product status. | 0–1 years; new graduate or entry-level process engineer transitioning from technical/cleanroom operations. |
| P2 | Applies conventional process engineering knowledge to a defined tool set, sustaining and documenting specific tool processes, SPC, and quality-system practices. | Exercises judgment in familiar contexts; analyzes process data and runs defined experiments to address moderate-scope tool or process issues. | Builds productive project relationships with operators and fellow engineers; instructs operators and may mentor junior staff. | 2+ years with a BA/BS, or MS/PhD with no experience, in a process engineer or senior technician role. |
| P3 | Applies in-depth knowledge of one or more process modules to own and improve full process windows and qualify new processes and tools. | Evaluates identifiable factors across diverse module problems; plans DOE and leads root-cause/yield investigations with milestone review. | Networks with senior process, integration, and design professionals; coordinates project activities and mentors junior engineers. | 5+ years (BA), 3+ years (MA), or PhD without experience; integration/yield (PIE) or process engineer level. |
| P4 | Applies advanced expertise across multiple processes (litho, etch, deposition, CMP) and tool acquisition to drive functional-level capability and yield. | Performs in-depth analysis of complex variables across product transitions and tool qualifications; selects methods and resolves multifaceted defect/yield issues. | Coordinates across design, integration, equipment, and production groups; may lead projects and influence manufacturability decisions. | 8+ years, often with graduate education; senior or lead process engineer level. |
| P5 | Applies expert, strategic mastery of process technology and node architecture spanning fabs to advance site yield, cost, and cycle-time objectives. | Tackles strategic and unique issues involving intangibles (cycle time, cost, multi-fab roadmaps) with high independence and broad latitude. | Builds influential networks across fabs and partners with the network and external stakeholders on BKM deployment and strategic projects. | 12+ years with extensive process expertise; principal engineer / process architect level. |
Skills
Focus-specific skills the role applies — the relevance layer beyond the occupational base.
- Photolithography
- Operating a machine that projects light beams to imprint a pattern on wafers; includes coating, exposure, develop, inspection, and measurement.
- Etch (wet and dry)
- Cutting or dissolving a pattern into the wafer surface using wet etch or dry etch processes such as RIE/ICP.
- Thin film deposition
- Depositing thin film layers on wafers for high volume manufacturing, including processes like PECVD.
- Diffusion
- Operating furnaces and equipment to alter the conductive properties of wafers via diffusion processes.
- CMP
- Chemical mechanical planarization to polish and remove irregularities from wafer surfaces.
- Metrology
- Measuring critical dimensions and film thickness using instruments like SEM, TEM, ellipsometers, and profilometers.
- Failure Analysis
- Diagnosing process and product failures using techniques such as SEM, FIB, TEM, EELS, XPS, and TOFSIMS.
- Statistical Process Control (SPC)
- Using statistical methods and control charts to monitor and control process variation and maintain yield.
- Design of Experiments (DOE)
- Structured experimental methodology used to develop, optimize, and qualify processes.
- Yield improvement
- Driving improvements in manufacturing yield and reducing defects across process modules.
- Structured problem solving
- Applying methods such as 5 Whys, fishbone, and 8D to root-cause and resolve issues.
- Quality systems
- Working knowledge of quality standards and tools such as TS16949, ISO9001, FMEA, Control Plan, MSA, SQC, and Gauge R&R.
- Data analysis
- Interpreting process data and designing experiments using statistical analysis software such as JMP, Minitab, Weibull++, Python, and R.
- Cleanroom operation
- Working in contamination-controlled cleanroom environments wearing special garments, often on rotating shifts.
- Design for Manufacturability (DFM)
- Collaborating with design engineers to ensure new products are manufacturable and scalable.
- Capital equipment acquisition
- Specifying, evaluating, characterizing, and qualifying new fab tools.
Provenance
The evidence base behind this profile — every layer is sourced; quality is scored by an adversarial review panel (1–5; passes at ≥4 on the minimum dimension).
11 sources
- O*NET 51-9141.00 Semiconductor Processing Technicians (onetonline.org/link/summary/51-9141.00)
- BLS Occupational Outlook Handbook — Semiconductor Processing Technicians (bls.gov/ooh/production/semiconductor-processing-technicians.htm)
- Broadcom job postings
- Teledyne FLIR job posting
- Fujifilm Engineer II job posting
- Micron job postings
- TSMC job postings
- Polar Semiconductor job posting
- Microchip Manufacturing Technician posting
- Aggregator job-description sources
- Semiconductor career-path guides
Level — P1 — Entry-Level Professional
New to role or field; performs basic tasks under supervision
- Scope
- Own tasks within a defined component
- Autonomy
- Close supervision; work reviewed frequently
- Complexity
- Routine problems with known solutions
- Impact
- Own deliverables
- Decision rights
- Few independent decisions; escalates the rest
- Leadership
- None — building the craft
- Typical experience
- 0–2 yrs
Adjacent roles
Nearest roles by structural coordinates (level + taxonomy). Distance 0 → 1; each carries its 3-state match band. How coordinates work → · Compare side-by-side →
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- code=51-9141source=jfm-factory.resolve