# Chief Semiconductor Officer
**Electronic Design · Level E3**  
JobFrame `jf_electronic_design::E3` · https://jobframe.global/profile/jf_electronic_design%3A%3AE3

## About the role

Top executive accountable for the company's overall integrated circuit and electronic design strategy.

## Market pay

Market pay for this role is maintained live (level-differentiated, basis-labeled) on the canonical profile: https://jobframe.global/profile/jf_electronic_design%3A%3AE3

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Generated from the JobFrame canonical record `jf_electronic_design::E3` on 2026-07-30T23:35:26.040Z. Derived content: responsibilities source = none. The canonical, maintained version of this job lives at https://jobframe.global/profile/jf_electronic_design%3A%3AE3.